UNC- Charlotte ECGR 2181 - Fall 2015 - Logic Systems Design I
Recitation - All Sections: 8:00 - 9:15 F
Lecture: Section 001: 8:00 - 9:15 am, M/W, EPIC G222
Lecture: Section 002: 11:00 am - 12:15 pm, T/Th, EPIC 2222
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Computer Assignments

This page updated

December 1, 2015


CAD 1  -  CAD 2  - CAD 3  -  CAD 4  -  CAD 5




Computer Assignment 5,  Due 5:00pm, Wednesday, December 9 (both sections).
  • Assignment (pdf file). - Version 1 (don't use this anymore).
  • Assignment (pdf file)  - Version 2.  This fixes a few typos
  • The demo is during Brian's Office hours and recitation times.  Brian will also have extra hours on Wednesday, December 9.
  • top_tb.vhd VHDL test bench file for the assignment.
  • Hand this Lab Checkoff Sheet (you must modify it for this lab) to the TA when you demonstrate the lab.  Note:  You turn in one lab checkoff sheet and upload one report to Moodle for each group.

Computer Assignment 4,  Due 11:00am, Friday, November 20 (both sections).
  • Assignment (pdf file).   The demo is during Brian's Office hours and recitation times.
  • top_tb.vhd VHDL test bench file for the assignment.
  • You will need this VHDL file (debouncing the buttons).
  • Hand this Lab Checkoff Sheet (you must modify it for this lab) to the TA when you demonstrate the lab.  Note:  You turn in one lab checkoff sheet and upload one report to Moodle for each group. 

Computer Assignment 3,  Due 11:00 am, Friday, November 6 (both sections).

Computer Assignment 2,  Due 11:00am, Friday, October 16 (both sections).

Computer Assignment 1,  Due Thursday, October 1, 2015, 5pm on Moodle.