ECGR2181 - Logic Systems Design I

Spring 2006 Class activities and Lecture Notes

1/10/06 - Covered Syllabus and notes 1
1/12/06 - Covered notes 2 - first half
1/17/06 - Covered notes 2 - second half
1/19/06 - Covered notes 2 - last 4-5 pages; Covered notes 3 - first quarter
1/24/06 - Covered notes 3 - second quarter
1/26/06 - Covered notes 3 - third quarter
1/31/06 - Completed Notes 3, Covered notes 4 - first quarter
2/2/06 - Covered notes 4 - middle half
2/7/06 - Covered "notes 4 expanded"
2/9/06 - Misc Topics - Chalk talk
2/14/06 - Exam 1
2/16/06 - Using the Xilinx ISE 7.1i Schematic Design Entry application on Mosaic machines (Chalk talk)
2/21/06 - In class exercise (20 points) - use the Xillinx tools and download to an FPGA board (XOR).
2/23/06 - Covered first few pages of Notes 5
2/28/06 - Covered examples of timing diagrams, more on Notes 5
3/2/06 - In class exercise (20 points) - use the Xillinx tools and download to an FPGA board (Decoder)
3/14/06 - Remainder of Notes 5
3/16/06 - In class exercise (20 points) - use the Xillinx tools and download to an FPGA board (Decoder-VHDL)
3/21/06 - Notes 6 (pp. 1-24 covered)
3/23/06 - Covered rest of notes 6
3/28/06 - In class exercise (20 points) - use the Xillinx tools and download to an FPGA board (Verilog)
3/30/06 - Exam 2
4/04/06 - Notes 7 (pp. 1-28 covered)
4/06/06 - Reviewed Test
4/11/06 - Notes 7 (pp. 29-40 covered)
4/13/06 - University Closed
4/18/06 - Notes 7 (pp. 41-62 covered)
4/20/06 - Notes 7 (pp. 63-72 covered), Notes 8 (pp. 1-5 covered)
4/25/06 - Notes 8 (pp. 6-30 covered)
4/27/06 - In class exercise - use the Xillinx tools and download to an FPGA board (Verilog) AND simulate.
5/2/06 - In class exercise - use Xillinx tools to write a VHDL test bench and simulate inputs.

Digital Design References

Other notes