NSF CSR PI meeting 2017 in Orlando, FL (colocated with IPDPS)


The PI meeting will be a one day event on Friday June 2nd, 2017 in Orlando, Florida and be co-located with the IPDPS conference. Also the meeting is held administratively as an IPDPS workshop, so one will need to register to the workshops to be able to attend.

PIs should bring posters to foster discussion about their work. The meeting provides the opportunity for PIs of awards to inspire the community with their ideas and new developments. The meeting also provides a platform for NSF personnel to present the current CSR program, share their vision of where the CSR program is going, and hear ideas for future program changes from the CSR community. Time is be allotted for all participants to interact, to share results and ideas, and to foster collaboration.



Mosharaf Chowdhury, “Rack-Scale Memory Disaggregation”

Memory-intensive applications suffer large performance loss when their working sets do not fully fit in memory. Yet, they cannot leverage otherwise unused remote memory when paging out to disks even in the presence of large imbalance in memory utilizations across a cluster. Existing proposals for memory disaggregation call for new architectures, new hardware designs, and/or new programming models, making them infeasible. In this talk, I'll describe the design and implementation of Infiniswap, which opportunistically harvests and transparently exposes unused memory to unmodified applications. We have implemented and deployed Infiniswap on an RDMA cluster without any modifications to user applications or the OS and evaluated its effectiveness using multiple workloads running on unmodified VoltDB, Memcached, PowerGraph, GraphX, and Apache Spark. Using Infiniswap, throughputs of these applications improve between 4X (0.94X) to 15.4X (7.8X) over disk (Mellanox nbdX), and median and tail latencies between 5.4X (2X) and 61X (2.3X). Infiniswap achieves these with negligible remote CPU usage, increases the overall memory utilization of a cluster, and works well at scale.

David Kotz, “Computational Jewelry for Mobile Health”

Wearable technology enables a range of exciting new applications in health, commerce, and beyond. For many important applications, wearables must have battery life measured in weeks or months, not hours and days as in most current devices. Our vision of wearable platforms aims for long battery life but with the flexibility and security to support multiple applications. To achieve long battery life with a workload comprising apps from multiple developers, these platforms must have robust mechanisms for app isolation and developer tools for optimizing resource usage.

We introduce the Amulet Platform for constrained wearable devices, which includes an ultra-low-power hardware architecture and a companion software framework, including a highly efficient event-driven programming model, low-power operating system, and developer tools for profiling ultra-low-power applications at compile time. We present the design and evaluation of our prototype Amulet hardware and software, and show how the framework enables developers to write energy-efficient applications. Our prototype has battery lifetime lasting weeks or even months, depending on the application, and our interactive resource-profiling tool predicts battery lifetime within 6-10% of the measured lifetime.

Kirk Cameron, “VarSys: Managing Variability in High-Performance Computing Systems”

The usefulness of the smallest mobile system in a pocket and the largest and fastest supercomputers in datacenters around the world require unrelenting advances in systems software design. These advances make computers faster, more reliable, more secure, better able to analyze large data sets, and ultimately essential to the lives of nearly everyone on the planet. Variability can wreak havoc on the performance of large-scale computer systems that support high-performance computing and e-commerce. In high-performance computing, variability threatens U.S. competitiveness and our ability to achieve exascale performance within the cost and energy constraints of supercomputers. In e-commerce (e.g., Amazon and Wall Street trading), variability threatens profit margins by requiring greater capital expenditures to compensate for potential swings in the performance of datacenters and the cloud. This project develops first-principal techniques within the VarSys software framework to identify and control aspects of variability to improve the design and operational efficiencies of both high-performance and cloud systems. The resulting framework is integrated in undergraduate systems courses where students perform variability experiments and provide data and insights in service to research goals. Early results indicate variability challenges require and await a broad community of researchers from nearly every subdomain in computer science.

Wei Gao, “Designing Hierarchical Edge Cloud for Mobile Computing”

Cloud computing can be leveraged to bridge the gap between the increasing complexity of mobile applications and the limited capabilities of mobile devices, but traditional cloud computing based on data centers are incapable of efficiently executing mobile applications due to excessive network latency accessing data centers and significant overhead for provisioning and managing Virtual Machines (VMs). Existing edge cloud solutions reduce the network latency accessing data centers by deploying servers at the network edge, but cannot handle the peak load from mobile users exceeding the capacity of individual servers. The goal of this research is to design the edge cloud as a tree hierarchy of geo-distributed servers, so as to efficiently handle the peak load and satisfy the performance requirements of remote program execution.

Avinash Kodi, “Reconfigurable Photonic Network-on-Chip for Heterogeneous Multicores”

As the relentless quest for higher throughput and lower energy cost continues in heterogenous multicores, there is a strong demand for energy-efficient and high-performance Network-on-Chip (NoC) architectures. Heterogeneous architectures that can simultaneously utilize both the serialized nature of the CPU as well as the thread level parallelism of the GPU are gaining traction in the industry. A critical issue with heterogeneous architectures is finding an optimal way to utilize the shared resources such as the last level cache and NoC without hindering the performance of either the CPU or the GPU core. Photonic interconnects are a disruptive technology solution that has the potential to increase the bandwidth, reduce latency, and improve energy-efficiency over traditional metallic interconnects. In this poster/talk, we propose a CPU-GPU heterogeneous architecture called SHARP (Shared Heterogeneous Architecture with Reconfigurable Photonic Network-on-Chip) that clusters CPU and GPU cores around the same router and dynamically allocates bandwidth between the CPU and GPU cores based on application demands. The SHARP architecture is designed as a Single-Writer Multiple-Reader (SWMR) crossbar with reservation-assist to connect CPU/GPU cores that dynamically reallocates bandwidth using buffer utilization information at runtime. As network traffic exhibits temporal and spatial fluctuations due to application behavior, SHARP can dynamically reallocate bandwidth and thereby adapt to application demands. SHARP demonstrates 34% performance (throughput) improvement over a baseline electrical CMESH while consuming 25% less energy per bit. Simulation results have also shown 6.9% to 14.9% performance improvement over other flavors of the proposed SHARP architecture without dynamic bandwidth allocation.

Abhishek Chandra, “Location, location, location (L3): Support for Geo-Centric Applications”

Recent years have seen the proliferation of a variety of sensors embedded in different environments, and the increasing availability of smart wearable devices. Together these trends have resulted in the growth of sensor data of interest to many communities across social, economic, health-care, and scientific domains. This has led to the emergence of geo-centric applications: a class of applications that can process and extract rich information from the sensor data to provide novel services to users. However, these applications currently suffer from poor performance and failures due to the limited computing and storage resources available on the devices and their location dependency. This project will develop new computing abstractions, algorithms, and systems, that enable a new frontier of geo-centric applications to be supported. The goal of this project is to catalyze the role of computer systems in meeting the needs of emerging geo-centric applications in mobile, sensor, and Internet-of-things (IoT) areas. This project will build a system called Location, location, location: Support for Geo-Centric Applications or L3 for short. This project will develop a number of novel system and application abstractions to manage the dynamism that arises from location in support of geo-centric applications. First is the concept of a Resource cloud, a system-facing abstraction that is geo-aware and manages a set of changing resources based on publish-subscribe and matchmaking. Second is the concept of a Resource container, an application-facing abstraction that provides policy-based resource selection and allocation across a diverse set of resources including storage, computation, and even data sources, to meet the specific requirements of an application. The project will address specific research problems that arise in the design and implementation of the Resource cloud and Resource container, including: on-demand resource provision to the Resource cloud, collective matching of resource requests that scale to diverse resource types and to highly shared resources, and automated resource policy generation and optimization based on application requirements.

Lucy Dunne, “One Shirt to Rule Them All: Pursuing the Vision of a Garment-Based Wearable Technology Platform”

The second wave of wearable technology hype saw a dramatic increase in commercially available consumer devices. However, this advancement came at a cost to the scope of applications, and the limitations of wristbands and activity trackers are becoming ever more evident to consumers. From an industry perspective, durability, scalability, and interaction constraints play a large part in the decision to develop discrete, stand-alone devices fabricated from hard goods. We see an urgent need for scalable manufacturing of textile and garment-based wearables, and an opportunity to develop a unified "platform" garment that could support a wide range of technology applications. But what would such a garment do, how would it look, and how would it be made? Our work pursues two thrusts: 1) an effort to map the application space of wearable technology in order to derive the requisite technological functionality needed in a platform; and 2) an effort to develop manufacturing methods for distributing and embedding electronic functionality into garments while leveraging the infrastructure and techniques of the cut-and-sewn apparel industry. In short, we seek to develop a preliminary proof-of-concept based on a standardized garment (currently: a button-up dress shirt), manufacturable in an apparel factory, that embeds versatile functionality.

Kate Keahey, “A Large Scale Reconfigurable Instrument for Computer Science Experimentation”

Computer Science experiments require a platform that is deeply reconfigurable, provides up-to-date resources, as well as sufficient scale. This talk will describe the Chameleon testbed, consisting of ~15,000 cores and 5PB of total storage, distributed between two sites (UC and TACC) connected by a 100 Gbps network. The testbed contains a large homogenous partition to support experiments at scale, as well as heterogeneous elements including Infiniband networking, high-bandwidth I/O nodes, storage hierarchy nodes, multiple types of GPUs, FPGAs, as well as clusters of ARM and Atom processors. To support Computer Science experiments, ranging from operating system and virtualization research to innovative applications, Chameleon provides a configuration system giving users full control of the software stack: provisioning of bare metal, support for custom kernel reboot, and console access — but also a fully functioning cloud environment to support educational projects and cloud development. This talk will describe the capabilities of the system and give examples of a few research projects currently leveraging them.


Frequently Asked Questions

Do I need to register for IPDPS to attend the PI meeting?
Yes, mostly. You only need to be registered for the day when the meeting happens. That's Friday. You can register here
IPDPS hotel is full! Which hotel should I stay at?
There are a few hotels around the workshop venue. Some have shuttles to the venue. See information at the bottom of IPDPS' hotel page.
My poster does not appear in the list?
Send it to Erik Saule by email. (esaule@uncc.edu)
I have been asked to prepare a poster, how big should it be?
The poster board will be 4'x8'. So anything smaller than that will fit.
I am attending IPDPS' workshop, can I come to see the wonderful work done by NSF CSR?
Sure! Feel free to stop by and do not miss the poster session!
How do I get from the airport to the resort hotels?
You can take a cab, or Uber. But MEARS is running shuttles from the airport to the hotels around IPDPS. They are much cheaper and take about the same time.
Where is the event precisely?
The event is in the conference center of the Hilton Buena Vista Palace Hotel. It is on the conference floor. The plenary sessions are in the Citron-Center. The Poster and Breakout sessions will be in the Event Center.


The PI meeting is organized by Erik Saule and Geoffrey Brown.

For any information regarding the NSF PI meeting, contact Erik Saule by email (esaule@uncc.edu).

The PI meeting is supported by NSF under fund CNS-1740398.